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Super Contributor

21 days ago

CDC violations from DCFIFO

CDC-50007 design rules violation are coming internal from DCFIFO. What is the Altera suggestion for the violation internal to the IP. I can see DC_FIFO has false path constraint embedded in the ...

Timing

RichardT_altera

Super Contributor

21 days ago

Hi M,

Have you enabled the "Generate SDC File and disable embedded timing constraint" option in the IP?
https://www.intel.com/content/www/us/en/docs/programmable/683522/24-2/dcfifo-timing-constraint-setting.html

Does compiling the standalone DCFIFO IP have the same issue?
If so, could you share the design file?

Regards,
Richard Tan

Forum Discussion

CDC violations from DCFIFO

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