Carry Chain used as delay line - Problems with supllying LUT-s with ones and zeros

I was doing exactly same thing; I have placed delay line in one region with logicloc tool, but after that I have manually placed START block as close as possible to the beginning of the line. I am pretty sure that manual placement of START block in region of delay line caused mentioned problems with delay line deformation. Tomorrow I am going to do another try but just with delay line placed alone in one region. One question about your picture; what are blocks around your delay line? Also I need to ask how will You test your delay line. My current solution is usage of ALT_PLL megafunctions to create two phase shifted signals (Phase can be adjusted in range of picoseconds ). After that with simple logic I make START and STOP signal. START should be placed as close as possible to the beginning of delay line and connected to CarryIn wire. STOP signal should trigger all FF's.