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KittyBumpkins's avatar
KittyBumpkins
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5 years ago

Can't find nets in timing analyzer

I have a Cyclone IV design with 3 ROMs in it. Each ROM is 256 words by 256 bits. After I compile the design the RTL netlist viewer shows all 3 ROMs and the compilation report shows that the memory re...
KittyBumpkins's avatar
KittyBumpkins
Icon for New Contributor rankNew Contributor
5 years ago

Thanks for looking into this. I don't know what you mean by "create a new case", there is no way of creating support cases with Intel. I had to call Intel corporate to get this issue escalated and I just got lucky.