Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
7 years ago

Cannot edit the generated PLL Intel FPGA IP v18.0

Hi All, I am using Quartus Prime v18.0 and generated PLL IP v18.0. I have successfully generated the PLL and added into the project but when I tried to modify it in the IP components, the Me...
MAmin's avatar
MAmin
Icon for New Contributor rankNew Contributor
7 years ago

Hello I too am having issues similar to those mentioned above.

I cannot find the specified library path after upgrading from 16.1 to 18.1 for the Native PHY IP.

Please help.

There does not seem to be a .lst file located in the ip generated directory.

I did a search in the product folder and nothing came up.