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Altera_Forum
Honored Contributor
8 years agoCannot edit the generated PLL Intel FPGA IP v18.0
Hi All, I am using Quartus Prime v18.0 and generated PLL IP v18.0. I have successfully generated the PLL and added into the project but when I tried to modify it in the IP components, the Me...
Altera_Forum
Honored Contributor
8 years agoHi Zeahr,
Thank you for your efforts, I replicated the issue & got the same “library paths” issue. We will come back soon. Best Regards Vikas Jathar (This message was posted on behalf of Intel Corporation)