cache data on chip ram

If you post your actual code, or a code snippet that compiles so that we can see the actual dependency report, it would be a lot easier to judge. However, based on your pseudo-code, I can tell you have a read after write dependency on the "data_buffer". Access latency to Block RAM-based on-chip buffers is not single cycle and hence, such dependencies are unavoidable unless you make your on-chip buffer small enough so that it can be implemented using registers. Using# pragma ivdep will be incorrect in your case since the dependency the compiler detects is a real dependency.