Forum Discussion
Altera_Forum
Honored Contributor
9 years ago> Why not just make your life easier and call them :
Because (1) it is a minimum-sample. In my real project, they will be called such as "local_xxx" or "sub_xxx", that will be conflicts someday and hand-mangling makes hard to read/write codes, and (2) for the polymorphism. To implements and evaluate new ideas, algorithms and/or logics for the FPGA, to change the sub-module implemented on logic X to logic Y's, it is one of a simple way to change the library. To achieve (2) will easy; Select the architecture or use macros to replace, but (1) -- hiding modules is a best way to avoid conflicts -- is difficult.