Forum Discussion
Altera_Forum
Honored Contributor
9 years agoThank you replies.
> Is the --synthesis library directive per file or per module? I have used the directive per module. > Synthesis directives are not part of VHDL,... I have thought that the directives should part of VHDL (like C), and not defined the synthesis directives in the IEEE's. I have zipped the project and uploaded to the dropbox. https://www.dropbox.com/s/q59tmjjrjj70img/vhdlproject.zip?dl=0 First Step, open the unzipped project, and compile (Ctrl+L). Second, modify main.vhd s/my_lib/my_lib2/ at line 29, 30, and save (Ctrl+S). Finally, re-compile (Ctrl+L). Then, open it in RTL-Viewer, open calc:i0 node, you will see it contains additive module. But mylib2::calc (in lib.vhd) uses multiply... Next Step, Menu -> Project -> Clean Project... to clean-up the project, then, re-compile (Ctrl+L). Now you will see calc:i0 contains a multiplicative module in RTL-Viewer.