Honored Contributor
Honored ContributorThank you for reply.
> First of all ... Ok, I am going to send the report to it. Thank you coach me. > What is this altera-extended-vhdl you speak of? there is no such thing. I had not read the 2008 spec because it has to purchase, so I had read the 1987's. I have thought that the synthesis-directive is not part of the IEEE's VHDL. In any case, Altera has implemented the directive. http://quartushelp.altera.com/current/#hdl/vhdl/vhdl_file_dir.htm --- Quote Start --- The Quartus® Prime software supports the following VHDL synthesis attributes and synthesis directives, which you can use in a VHDL Design File (.vhd) Definition to direct Analysis & Synthesis to perform or not perform certain actions when synthesizing a design: ... library: A VHDL synthesis directive that sets the destination library for the design units in a VHDL Design File. --- Quote End --- Altera-extended-vhdl that I said means VHDL with the synthesis directive function. > VHDL has no ability to "hide" modules behind namespaces. it will be incorrect partially. In at least Altera-implemented-version, VHDL has ability to port modules into namespaces (libraries), that hides sub-modules (if does not write "use xxx.all;"), that I just had wanted function. > I also note in your main.vhd, ... Thank you for teach me the numeric_std and so on. I had not known their. But it works that I have posted in my environment (let us try it), in spite of I do not know why it works nor how. Thanks.
