BRAM utilization and optimization

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This is a two part question: First, how do you look at memory utilization in Quartus? I have a design that is only using ~65% of the memory bits in my device (according to the summary) but apparently is using 99% of the actual blocks. Where in Quartus can I found out the actual block usage, which is the more important number in many cases, and why is it not in the summary?

Second, how can I make the design more efficient in how it uses the memory? Looking at the utilization by entity report I can see a lot of blocks with memories that are 100-200 bits and they eat an entire M9K for it. It's my understanding from what I've read thus far that I can put an inline command that will tell Quartus to use logic instead of M9Ks for specific memories but I'm using the Altera VIP suite so I can't modify the code. Is there a way to make a global setting that tells the tools to implement memories below a certain size in logic?

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You can check that readily in the project hierarchy window (on the left) after compilation. There is an excel like table for each level resource usage. Additionally you can look at compilation report(resource usage by entity).

True the number of bits is misleading since what matters is the number of blocks used. If few bits are used as ram it will deplete one entire block.

One thing to check is see if fitter has put shift registers in ram (a common tool behavior). You can then stop that at project level or module level or signal level by setting attribute on shift register ram inference to off. You can also set that globally at project fitter settings