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Altera_Forum
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10 years ago

BJT Code needs Debugging

Hi, I'm trying to compile the attached source codes. The NPN & PNP BJTs are in VHDL and the diode code is in verilog. I am using Quartus. Need help debugging. Any help will be ap...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

Got it thanks. I suppose I have asked a lot of questions without properly explaining what I am working on which is why my approach seems a bit peculiar. I am attempting to implement a logic design from switch level since my architecture is hypothetically on a 3 dimensional scale and defining components on switch level would offer the best control (I believe) of the FPGAs performance. Thanks for the input.