Best way to store ethernet frames?

Slight change, the counter still starts too early (it starts right away) because the frame signal is being synthesized away or something.

library ieee;
use ieee.std_logic_1164.all;
entity FrameHolder is
	port
	(
		clk,reset: in std_logic;
		input: in std_logic;
		foundframestart : out std_logic;
		countout: out integer range 0 to 1510;
		output: out std_logic
	);
end FrameHolder;
architecture structure of FrameHolder is
	signal prehold: std_logic_vector(63 downto 0);
	
	signal frame: std_logic;
	signal counter: integer range 0 to 1510;
	
	
	component preamble
	PORT
	(
		aclr		: IN STD_LOGIC ;
		clock		: IN STD_LOGIC ;
		enable		: IN STD_LOGIC ;
		shiftin		: IN STD_LOGIC ;
		q		: OUT STD_LOGIC_VECTOR (63 DOWNTO 0)
	);
	end component;
	
begin
	process(clk,reset,input)
	begin
		if(reset = '1') then
			counter<=0;
		elsif(clk'event and clk='1' and frame <= '1') then
			counter<=counter+1;
		end if;
	end process;
	
	pre: preamble port map(reset,clk,not frame,input,prehold);
	
frame <= '1' when prehold = "1101010101010101010101010101010101010101010101010101010101010101" else '0';
foundframestart <= frame;
countout <= counter;