Forum Discussion
Altera_Forum
Honored Contributor
15 years agoWell yes, indeed, but have you tried that? I suppose that you would find that the design is not working at all. The way I would do the evaluation of the IP core (and I believe that Altera did it that way too) is to include non-functional core into the SOF and then, after the core is downloaded, start the function of the core through the ByteBlaster. So if you do not use the Quartus to download the FPGA, the design will remain non-functional.