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Altera_Forum
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14 years ago

backdoor access to read/write altsyncram

Hi, Is there any function or backdoor access available to read/write the altsyncram memory model? I need to define some functions/tasks to read/write altsyncram mem model. One way is to define the...
Altera_Forum's avatar
Altera_Forum
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14 years ago

the easiest way would be to write behavioural VHDL that Quartus infers memory from, with a custom built backdoor interface that that synthesisor ignores. It would be fairly simple to create in VHDL (and probably verilog too), but you need a good understanding of VHDL