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Elit's avatar
Elit
Icon for Occasional Contributor rankOccasional Contributor
5 years ago
Solved

Avalon Verification IP Suite questions

Hi. I modified the avlmm_1x1_verilog_pro project from ug_avalon_verification.zip, adding Avalon-MM Monitor. According to Avalon Verification IP Suite User Guide, p.12: The monitor components use ...
  • SyafieqS's avatar
    SyafieqS
    5 years ago

    Hi Eliyahu,


    --- Is it possible to get a verification license and if not, how to avoid errors without changing files?---


    Yes it is possible to get the license file and you can contact Mentor for that. Commenting out "altera_avalon_mm_monitor_coverage module" would result in following as you said


    Error: (vsim-1) Unable to checkout verification license - testbench generation feature (randomize, randcase, randsequence, covergroup) is only supported with QuestaSim.


    Therefore, I guess the only way to proceed with this to use Questasim


    Thanks,

    Regards


Elit's avatar
Elit
Icon for Occasional Contributor rankOccasional Contributor
5 years ago

Thank you, Syafiq.

But I didn't get an answer to my second question :

how to avoid Modelsim Intel FPGA edition errors without change altera_avalon_mm_monitor.sv file -

comment out instantiation of altera_avalon_mm_monitor_coverage module?

Thanks,

Elit