Avalon to AXI bridge for Nios II in Qsys

Thank you. I have attached a screenshot of the SoC made in Qsys. On the Avalon MM master, what are cp and rp? And on the AXI slave, what are read_cp, write_cp, read_rp and write_rp? I couldn't find anything on these in the Altera documentation. I find that in Qsys, cp of the Avalon MM master can only be connected to either read_cp or write_cp on the AXI slave, not both. Also only one of read_rp or write_rp on the AXI slave can be connected to rp on the Avalon MM master. So what would be the correct way of doing these connections? Also, when I want Nios II to write something to DDR3, would a simple pointer reference be enough? I apologise for asking so many questions, but I'm quite new to all this.