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Altera_Forum
Honored Contributor
Honored ContributorAvalon to AXI bridge for Nios II in Qsys
Hello, I am trying to build a simple Qsys SoC consisting of a Nios II/e with on-chip memory. I also require to translate the Nios II signals from Avalon to AXI. Is there any IP in Qsys whic...
Altera_ForumHonored Contributor
Honored ContributorHi,
Thank you so much. I'm not adding the DDR3 memory controller in Qsys because I'm working with a preset Quartus II project which already has a megawizard controller. This controller is being used for a bunch of other functions. Would you happen to know roughly what the Avalon to AXI bridge IP is called in Qsys? Because I'm not able to find anything in Qsys with the required functionality.
