Avalon IP Verification Problem !!

Reviving an old unanswered thread ...

I want to simulate the mSGDMA core so I created a Qsys system with two mSGDMAs (one MM to ST and the other ST to MM) and tied all of the mSGDMA Avalon ports to Avalon BFMs. When I source the msim_setup.tcl script generated by Qsys in ModelSim (stand-alone ModelSim PE v10.5a, not the ModelSim included in Quartus), then run the "ld" command to compile and load the design, I get a slightly different version of the error posted above:

# ** Fatal: (vsim-3373) ./../../altera_merlin_slave_translator_160/sim/altera_merlin_slave_translator.sv(250): Range of part-select [3:4] into 'real_uav_address' [3:0] is reversed.

Same file at fault (altera_merlin_slave_translator.sv). The part-select is derived from parameters that are set at instantiation. Clearly some combinations of parameter values result in an illegal [3:4] part-select. I believe this is happening on the CSR ports of the mSGDMAs where the address width is 3.

Any ideas would be appreciated.