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PElm
New Contributor
New ContributorAutomatic use of internal block RAMs
I'm translating code from Xilinx devices to Intel to see if we could switch to Altera FPGAs. Xilinx tools automatically translate VHDL memory operations to block-ram without need to use macros or co...
Daixiwen
Occasional Contributor
Occasional ContributorYou will find recommended ways of describing memory in hdl in this document: https://www.intel.com/content/www/us/en/programmable/documentation/sbc1513987577203.html#mwh1409959579089
If you don't stick to the guide, sometimes it works and sometimes it doesn't. AFAIK shared variables are only used in Quartus to describe memories with dual clocks.
