Forum Discussion
ContributorAuto gated clock convert to clock enable
Hi,
Sorry for the late response. From what I know, case 2 is allowed.
You can refer to pages 12-10 to 12-12 of this document: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/qts/qts_qii51006.pdf#page=10
Is case 3 a cascaded clock gating? This only works on certain devices, I think it's best you don't use this method since you're doing ASIC prototyping.
Regards,
Nurina
Regular ContributorHi,
Sorry for the late response. From what I know, case 2 is allowed.
You can refer to pages 12-10 to 12-12 of this document: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/qts/qts_qii51006.pdf#page=10
Is case 3 a cascaded clock gating? This only works on certain devices, I think it's best you don't use this method since you're doing ASIC prototyping.
Regards,
Nurina
ContributorHi NurinaW,
Thank you, NurinaW, very much. I understand it. About case 3, a cascaded clock gating, ASIC has different application domain so that there needs a cascaded clock gating to gate the clock for different IP and for different application domain. So, I can't cancel that.
