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Altera_Forum
Honored Contributor
11 years agoAugmented circuit with lpm
Hi guys. I am having problem with my vhdl code. I got this error for my coding. I already attach my error (augmented circuit 1.jpg) and my coding (coding.txt). Kindly help me if every body know...
Altera_Forum
Honored Contributor
11 years agoI think you forgot to connect the clock and clock en to the multiply component. Its trying to connect qreg to the clocken and resultreg to the clock.
Lesson - use named association rather than positional association.