Honored Contributorsome one kindly help me in assigning pins for clock and the led for DE2 115 using quartus,
module FirstProject(clk, LED);
output LED; input clk; reg count1; reg LEDstatus; assign LED = LEDstatus; always @ (posedge clk) begin if (count1 < 10000000) begin LEDstatus <= 0; end else begin LEDstatus <= 1; end count1 <= count1 +1; end endmodule
Honored ContributorStart an Analysis and Synthesis process, so that Quartus automatically collects the I/O pins from your project.
Then, go to the Quartus Assignments menu and select Pins. You are presented with the list of the I/Os and you simply assign each of them the desired fpga pin. Refer to DE2 115 schematic to find out what fgpa pins are connected to actual LEDs, clocks and so on.Honored Contributoryes, thank you
Honored Contributorcan we automatically assign pins by selecting the csv file of the pin comes with DE2 115 board for the below case , if so how can i do that ?
nbi4(clk, segA, segB, segC, segD, segE, segF, segG, segDP);
input clk;
output segA, segB, segC, segD, segE, segF, segG, segDP;Usually pin assignments are stored in a .qsf file. Anyway, if DE2-115 package supplies a csv file, you can import it from Quartus Assignments menu.
In any case, your top module pin names must match I/O names defined in assignment file. Then segA, segB, ... possibly need to be replaced with actual names.Honored Contributoryes,
it solved almost all my troubles starting to learn verilog thank youHonored ContributorDoes anyone have DE2 115 pin assignment csv file, I can't find mine. Thanks in advance.
Honored ContributorUsually the best place to go for any of the Terasic boards is their website: http://www.terasic.com.tw/en/
You can get access to all the documentation and tools for their products, active and retired, there.Honored Contributorrename the file to .csv
Honored ContributorThank you, Y.Loi!
