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Altera_Forum's avatar
Altera_Forum
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14 years ago

Assigment "Slew Rate"

Hi,

we have many trouble with EMV and Reflection with my data and clock out (BT656 27MHz).

I will set Slew Rate with the "Assigment Editor" . The range ist 0-3. But which these values mean? Theres ist no description.http://quartushelp.altera.com/9.1/mergedprojects/logicops/logicops.htm#logicops/def_slow_slew_rate.htm (http://quartushelp.altera.com/9.1/mergedprojects/logicops/logicops.htm#logicops/def_slow_slew_rate.htm)

Does someone know more?

Thanx!

5 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    you really should try a HyperLynx simulation to ensure the proper I/O drive settings

  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    That made we everything, but I do not know yet which values for 0,1,2.

  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    Hi,

    0 is slow slew rate, 2 is fast slew rate. The slew rate can not be set for 3.0-V PCI, 3.0-V PCI-X, 3.3-V LVTLL and 3.3-V LVCMOS I/O standard. For these I/O standards the slew rate is always 2 and can not be changed.
  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    Many many Thx:)

    That is exactly which I searched.

    I did nothing over it found in Altera/Quartus documents.

    Where can I do this important know to find?:confused:
  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    You can find it in the Cyclone III/IV device handbook (chapter 6) (maybe also in the Stratix Device handbooks).