Forum Discussion
Altera_Forum
Honored Contributor
16 years ago --- Quote Start --- Hello, Why not try to remove all the .tdf files as explained it the Support? Perhaps it will work. Isaac Campos --- Quote End --- Thanks Isaac, Do you mean to delete the 'auto' generated *.tdf files from "db/" folder! I've done that and rerun the Synthesis flow; but those files got regenerated and same error occured! As I have pure HDL code and no other generated IP/Memory from quartus tool. All the RAM is INFERRED from VHDL code. Is there anything other can be done which is not like deleting auto-generated files? For example, without modifying the HDL code; any command like switches, etc. Thanks again. -aditya