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Altera_Forum
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16 years ago

Assertion error while synthesizing in Quartus2 9.0

Hello, I'm new to Altera devices and Quartus. I'm retargetting a big hierarchical design with Memory Wrappers containing behavioral code for FPGA flow. While synthesizing, the tool...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Hello,

Why not try to remove all the .tdf files as explained it the Support? Perhaps it will work.

Isaac Campos