Forum Discussion
AndyRea
New Contributor
4 years agoArria 10 Simulations with ModelSim
i am trying to use modelsim to simulate some chunks of a VHDL design which now include some FIFO modules ( the design also has PCIE, JESD cores and a whole bunch of other stuff )
I can compile th...
SyafieqS
Super Contributor
4 years agoAndy,
Are you able to e-create a new project with the relevant source in it just to try and exclude these failing modules and see if the simulation pass the flow?