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I tried compiling it and it failed
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Sorry, that is what I get for typing it into the forum directly - it should be std_logic_vector.
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In your first post you sent 3 links to code you posted previously that I couild look at and get ideas from .
I have had a very quick look but I think its beyond my capabilities at the momment , its talking about starting the TCL console and I havent looked at TCL yet
but , I will have a proper look and see what I can make of it , but it may be for further along my learning curve
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Unzip the zip files and look at the VHDL. You can blindly follow the procedure to synthesize or simulate the design, and that will show you you have some working code.
Cheers,
Dave
Honored Contributor
