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Altera_Forum
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8 years ago

ALT_SLD_FAB Errors

Hello, I have been using FPGAs and CPLDs up to some extent in industrial applications. Just out of curiosity, I have been trying to implement a NIOS II system following the exact same steps in ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

This sounds like it's related to SignalTap. If the design is instrumented with SignalTap you might try removing it and see if the error goes away. That would at least help isolate the problem for you.