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Altera_Forum's avatar
Altera_Forum
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14 years ago

After Synthesis 0% device utiliztaion

Hai after synthesis i got an RTL but quartus summarize 0% device utilization eventhough i have got all the components that i intended

Please help

Thanks in advance

Aneesh R

2 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    14 years ago

    This means that the synthesisor has "optimised away" your entire design. This could be for many reasons.

    1. No Inputs or outputs connected

    2. Clock stuck at '0' or '1'

    3. clock enable stuck at '0'

    4. reset held at '1'

    So check your design for these conditions.
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    14 years ago

    I am developing an 8-bit procesor IP core. I will check the above conditions

    Thak u very much