Add/Subtract Two numbers in verilog HDL

You must write HDL (Hardware Description Language) code, not programming code.

What you describe in your code is supposed to be synthesized into logic gates, not to be executed by a processor.

I think your present code is useless and it needs to be completely rewritten.

A few hints:

- those while loops make no sense. Remember: this is HDL, not software

- the hex to bcd decoders could be more conveniently fitted into a reusable submodule

- use a clock to sync the whole process

- take a basic HDL course or read a Verilog tutorial