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Altera_Forum
Honored Contributor
9 years agoSeveral versions of Quartus ago I had a similar problem. I created a custom component that triggered an interrupt upon any access to its Avalon slave port. It ignored writes and returned 0 for reads. I created several instances and set the addressing so that they collectively covered most of the 32 bit address space that wasn't used by other components. That was enough to debug where my rogue accesses were coming from.