Adding components to reference QSYS design, exported pins don't show up

Hi all,

So I've been working with the Cyclone V GT dev kit, using a reference PCIE design provided on the altera wiki: http://www.alterawiki.com/wiki/reference_design:_gen2x4_avmm_dma_-_cyclone_v

The base design works as intended, but I want to build a module to interface with on chip memory as well as external pins that will be providing inputs to the system. The problem I'm having is when I build a new QSYS component, add it to the reference system, and then export its conduit signals, they don't show up by default in the pin planner after analysis and synthesis. Is there a specific step that needs to be taken to cause a top level qsys exported signal to show up in the pin planner list?

Any ideas?

Thanks,

Nit