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Altera_Forum's avatar
Altera_Forum
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13 years ago

Add SignalTap II ,the project won't compilation

Guys: before i add some signal to the signaltap II ,the whole project compilation is complete , and it work well on FPGA , but after i add some signal to the signaltap the compile came up...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

I've had this problem and it seems that SignalTap cant tap a tristate or bidirectional bus. This may be because the synthesiser converts a bidirectional bus into something else (FPGAs don't really do tristate busses internally) and the pre-synthesis nets don't exist.