Honored Contributor
Honored ContributorI've found there's quite a large amount of Terasic's 'reference' code that could do with some attention - although this isn't that bad...
Don't be fooled by the fact that the line of code updating 'response_valid_r' might appear to be immediately before it is tested. You could put the statement updating 'response_valid_r' after the if statement and realise the same behaviour. Both statements are evaluated on each rising edge of the clock. The test where the conditional statement is true will be when 'response_valid_r' is low and 'response_valid' has gone high, the clock cycle before 'response_valid_r' has been updated (high). Ultimately, it's looking for a rising edge on 'response_valid'. Thus you end up with a single clock cycle where the 'if' statement is true. If in doubt, simulate that little block of code. Cheers, Alex
