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Hi RichardTanSY,
I have not installed V21.3 and If I want, I need to apply for this, it's not convenient.
And I can provide additional information, one project like the above which use more less resource and its routing hotspots got from V17.1 is like to V18.0, so I inferred that the strategy is changed from V17.
Brs,
Lambert
Hi @lambert_yu
Sorry for the late response.
Could you share the projects (v16.0 and v18.0) that can duplicate these behaviour?
Will need to check this with the engineering team.
Best Regards,
Richard Tan
p/s: If any answer from the community or Intel support are helpful, please feel free to give Kudos.
- lambert_yu4 years ago
Contributor
Hi Richard,
I'm so sorry that I have no authority to share the RTL code to you.
And I can only tell you some information about this project:
first resource (based on 10ax115)
ALM : 21%; Total register : 125543; Total block memory bits 1%; HSSI RX channel 8/48 (17%); Total HSSI TX Channel 4/48 (8%); Total PLLs 57/112 (51%).
For transceiver : 4 Simplex RX IP (each have 4 channel); 2 Simplex TX IP (each have 2 channel). And all IP all located in different banks.
Second,I think you could use one bigger project like above and maybe the result as the picture which I show above, thanks.
Brs,Lambert