Forum Discussion
Altera_Forum
Honored Contributor
Honored ContributorAbout styles of writing FSM
Hi, I find many people on their blog suggest coding FSM as follow.
always @ (posedge clk or negedge rst_n)
if(!rst_n)
current_state <= IDLE;
else
current_state <= next_state;
alw...
Altera_ForumHonored Contributor
Honored ContributorAltera recommends using localparams (or in system verilog use an enumerated type) because it makes the code easier to read. The synth tool can still extract the state machine from either style and will auto assign state values for you based on your synthesis settings (1 hot, grey code, counter)
