Your last example is consuming not less than 64k registers or memory cells. In special cases, Quartus would be able to implement it in internal RAM, but most likely it can't. So you need a pretty large FPGA to implement just the registers. Adding some logical or arithmetical equations operating on the data, the construct most likely doesn't fit any affordable device. Just another spotlight on your way of writing FPGA code.
Generally number crunchers and special arithmetic units can be perfectly implemented in FPGA. They can be assumed to beat any standard processor or DSP in calculation speed. But they must be well-considered. You have to find a suitable combination of parallel and sequential processing and respective data storage. It surely doesn't work by only copying some statements from MathLab or C code.