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Altera_Forum's avatar
Altera_Forum
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16 years ago

a question in quartus

I have some questions I have a matlab code which i want to convert it to VHDL code. The idea in the matlab is using for loop where i compute some matrices by using some vectors I have already c...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

your code:

--- Quote Start ---

for i in 0 to 255

wire1<=syst_bit(i);

wire2<=parity1(i);

gamma(i)<=wire3;

end loop;

is this right or not?

--- Quote End ---

wouldn't work, wire1,wire2 will be updated by last value only after 255 useless assignments.

why not create arrays in vhdl just like those of matlab and add/multiply the elements as required?