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Honored Contributor
Honored ContributorA question about parameterized structure between interface and module
Hello everyone! I have a design that is using client/server architecture, one server module polling multiple client module periodically to check if the client module needs update, and if the clien...
Altera_ForumHonored Contributor
Honored ContributorThe only option here is to separate the ports as you suggest, as Verilog does now allow what you suggest.
In VHDL 2008, you can do this as you can define records with unconstrained data structures that are constrained when they are used, and this is supported in quartus.
