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Altera_Forum
Honored Contributor
13 years agoAs suggested by the Error information given by your compiler:
--- Quote Start --- Error (10500): VHDL syntax error at uppgift4a_Moore_2.vhd(42) near text "open"; expecting "(", or an identifier ("open" is a reserved keyword), or unary operator --- Quote End --- "open" is a reserved word in VHDL syntax. For example, you can change your state_type definition to: type state_type is (opening_1,closing_2, opened, close) You can use any name for this state except "open". Any tutorial on VHDL will give a list of reserved words in VHDL syntax. When writing code, you should avoid using any of these reserved words as a name of user-defined object, such as signal, variable, entity, architecture, enumerated data types, etc.