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Altera_Forum
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12 years ago

7 Segment decoder help

Hi, I am new to VHDL and trying to create a VHDL module for a 7 segment decoder. The code I used is below library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_...
Altera_Forum's avatar
Altera_Forum
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12 years ago

"digit" is defined as Input. Therefore the values for "digit" must come from outside. You try to load "digit" with an internal signal (D0, D1, D2, D3).

Where does the values for D0 to D3 come from? I don't see an Input for them.