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Altera_Forum's avatar
Altera_Forum
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11 years ago

32-bit adder Carry Look-ahead

Hi, I am new to Verilog and I am trying to implement a 32-bit adder Carry Look-ahead, but the output is incorrect. I included the simulation in ModelSim and my verilog code. https://www.alterafo...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

hie v1t0ry,

sure, no problem.

could i suggest that you:

a) upload your fixed code here? if it's not confidential, then it would be really helpful as well for other forum members if they happen to have the same problem and stumble across your code? =)

b) also, if not confidential, upload a copy of the fixed / working code in the Share Materials section of the forum?

http://www.alteraforum.com/forum/forumdisplay.php?f=16

just my 2 cents, to help each other out!

take care and have a nice day!