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Altera_Forum
Honored Contributor
11 years ago32-bit adder Carry Look-ahead
Hi, I am new to Verilog and I am trying to implement a 32-bit adder Carry Look-ahead, but the output is incorrect. I included the simulation in ModelSim and my verilog code. https://www.alterafo...
Altera_Forum
Honored Contributor
11 years agoHey,
i was looking for a similar code and i actually found this. i think it's a good idea to combine 4-bit-adders to get the 32-bit-input as required. http://verilog-code.blogspot.com/p/types-of-adders-with-code.html You'll probably need to change the code slightly to implement into your design. but it's a pretty good reference! hope this is helpful to you. thanks.