We are not getting proper data when we do a read access to the on-chip memory via the AXI interface.

Hi, Our controller has both AHB slave as well as AXI Master interface. So the bridge component that we created in the QSYS system has both AHB and AXI interfaces. AHB interface is used to access our Controller’s internal registers from NIOS II processor. AXI interface is used to access the on-chip memory from our controller AHB interface works fine, we are able to read/write to our Controller’s internal registers from NIOS II processor. The issue is seen with AXI interface, when we do a read access to on-chip memory from our controller, we are not getting back the data properly. So removing the bridge will not help in our testing. Do you have any other suggestion on how to connect the AXI interface form our controller to the Avalon interface of the on-chip memory? Rgds, sunil