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Altera_Forum
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14 years ago

waitrequest signal for Avalon MM Slave

I have created a custom Avalon MM Slave component with SOPC v10.1 which uses chipselect_n, read_n, write_n, address/data, and waitrequest. Long story short I need it to be variable wait states so th...
Altera_Forum's avatar
Altera_Forum
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14 years ago

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but in Signal Tap this is what never happened)...???

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Where are you probing the bus with signaltap; at the master or at the slave?

Because the Avalon fabric exists between the two, the signals you see will not be identical. This is where simulating in Modelsim can help, as you can look at all the signals much more easily.

Cheers,

Dave