Verify Failed in Nios II

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This should be sufficient to hardcode the pin high:

output wire reconfig_req_n;

assign reconfig_req_n = 1'b1;

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Thanks, BadOmen,

I agree with your tip, but I was looking for some way to do this in a transparent mode for the code. Please follow my thoughts.

Regardless of a developent kit that supports Nios or not, if I want to implement a simple truth table in my development board, one of the possible ways to do this is:

1. write my truth table HDL code and compile it;

2. go o pin planner, perform a pin association with my logic inputs and outputs and compile my code again; and

3. download my .sof to the board.

I did not perform this basic experiment yet, but according to your tip, I would have to create in my HDL code an additional input to make a logic '1' assignment, inside the code and associate this additional input with PIN_J20, in my case (EP2S60F672C5ES Nios II Stratix II Dev Board).

If my thoughts are correct, my question is: is there any way to do this without have to interfere on the HDL codes? Any kind of hardware act, in Qsys, for example?

ps: yes, I know that I would not have to employ Qsys to buid a truth table...lol...