Hi, I'm working on the DE2-115 EVM and I'm trying to operate the SDRAM through NIOS II soft processor ("e" ver). In my code, I fill the memory with the "i" number- while increasing the case address...
The exception issue you are facing is normally due to problem with the system that cause Nios break.
I checked the project you attached. In Qsys perspective, everything looks perfect in term of Nios side and SDRAM side except for the ‘Reset vector memory’ and ‘Exception vector memory’ setting. Can you change this two setting to ‘sdram_first_controller.s1’ and let me know the test results.
If the results is passing then it is OK. If the results is still fail, then I suspect it is due to hardware issue already and you may need to contact the Terasic representative.
Thank you for your replay but no- it don't work even when changed the vectors (Reset & Exception vector) to point to the SDRAM.
Maybe I can test the hardware from the VHDL section (write and red the entire SDRAM section). Can I do that? Is there any reference of IP code to do that?