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Altera_Forum's avatar
Altera_Forum
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10 years ago

UART Test ISSUE (LOOPBACk)

hi,

I am using Altera Quartus 10.1 SP1, NIOS SBT 10.1 SP1 and ModelSim Altera Starter Edition 6.6D. I am trying to implement UART in SOPC and write a NIOS sample code and test it using ModelSim.

I built SOPC using UART, NIOS and Memory and generated sopcinfo files. After that created ELF by using this sopcinfo and launched in modelsim. What ever i print on console is reflecting on TXD line and i tried to loopback TXD to RXd but i unable to see any data in RXD Buffer[Serial to parallel converter]. Data is available on RXD line. Is there any other setting i need to do in order to test Loopback UART???

Please help in testing of UART LoopBack.

3 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    10 years ago

    Hi, which FPGA are you using? I am using the Cyclone V SoC and trying to assign the UART_RX and UART_TX signals to "special function" pins, but I am unable to do so.

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    9 years ago

    I have used the UART with the Cyclone V Terasic development board and it works fine. I have to find my files.

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    9 years ago

    If you look in the UART code created (by SOPC builder / QSYS) you might find there are two transmitters one is the real transmitter and the other is a stimulus source for rxd. You can go in and hack the connection to connect txd and rxd:-

    Have a look for some lines like this:-

    // assign source_rxd = rxd;

    and uncomment to become

    assign source_rxd = rxd;

    and also find the stimulus_transmitter and disconnect the txd output

    so change from

    .txd (source_rxd)

    to

    .txd ()