UART 16550 IP - Stick parity problem

Hi,

Check this https://www.intel.com/content/www/us/en/docs/programmable/683130/22-3/lsr.html:

Parity Error (pe):

Since the parity error is associated with a character received, it is revealed when the character with the parity error arrives at the top of the FIFO. It should be noted that the Parity Error (PE) bit (LSR[2]) will be set if a break interrupt has occurred, as indicated by Break Interrupt (BI) bit (LSR[4]). In this situation, the Parity Error bit is set depending on the combination of EPS (LCR[4]) and DLS (LCR[1:0]).

Break Interrupt (bi):

This is used to indicate the detection of a break sequence on the serial input data. Set whenever the serial input, sin, is held in a logic 0 state for longer than the sum of start time + data bits + parity + stop bits. A break condition on serial input causes one and only one character, consisting of all zeros, to be received by the UART.

In order for Parity Error (PE) bit to be set, the Break Interrupt (BI) bit has to be set first.

Thanks,

Best regards,

Sheng

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