Hi Franck,
Email send. Thanks.
On another side, I face a new trouble.
After fixing nios_sopc.h, barebox start, and I reach the prompt.
But shortly after, without notice, an exception is raised.
barebox@generic:/ iomem
0x00000000 - 0xffffffff (size 0x00000000) iomem
0xc4000000 - 0xc41fffff (size 0x00200000) ssram0
0xc5200000 - 0xc527ffff (size 0x00080000) onchip0
0xc8000000 - 0xcfffffff (size 0x08000000) ram0
0xcff30000 - 0xcff3ffff (size 0x00010000) stack
0xcff40000 - 0xcff9ffff (size 0x00060000) malloc space
0xcffa0000 - 0xcffeb7cb (size 0x0004b7cc) barebox
0xcffeb7cc - 0xcffedd6b (size 0x000025a0) barebox data
0xcffedd6c - 0xcfff3227 (size 0x000054bc) bss
0xe0000000 - 0xe3ffffff (size 0x04000000) cfi_flash0
0xe5000000 - 0xe5001fff (size 0x00002000) altera_tse0
0xe5003000 - 0xe50033ff (size 0x00000400) altera_tse0
0xe5003400 - 0xe500343f (size 0x00000040) altera_tse0
0xe5003440 - 0xe500347f (size 0x00000040) altera_tse0
0xe6000080 - 0xe600009f (size 0x00000020) altera_serial_jtag0
0xe60000a0 - 0xe60000bf (size 0x00000020) altera_serial0
0xe60000c0 - 0xe60000df (size 0x00000020) altera_serial1
barebox@generic:/
*** ERROR: unimplemented instruction @ c350fb40
# ## ERROR# ## Please RESET the board# ##
First, this never happen with our previous MPU design.
Second, It don't seems to occur when I "place" barebox at bottom of DDR3 (above 0xc8000000).
Third, instruction @ XXXX is random.
I give a look at nios2/lib/clock.c, and everything seems Ok. But I notice important side effect when I try some minor change on this file.
Linux kernel still running nicely.
Regards,
Christophe